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EndMaker: Make Your SystemVerilog Code Look Professional (Free Utility) PDF Print E-mail
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Thursday, 15 April 2010 12:46

This is a cool little utility that will make your SystemVerilog look much more professional. It simply adds an end-of-method identifier (label) to every task or function so that every endfunction turns into endfunction : function_name (with the appropriate function_name of course.. Duh!) and endtask turns into endtask : task_name.  This really makes your code more readable and consistent.

Attachments:
FileDescriptionFile size
Download this file (endmaker.txt)EndMakerAutomatic endfunction/entask label generator1 Kb
 
AutoDup: Create Test Variants Quickly (Free Utility) PDF Print E-mail
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Thursday, 01 April 2010 15:12

Coverage driven verification has a big advantage – you can write a single test, and let run it several times with random seeds. Each run will generate a slightly different scenario – depending on the nature of the constraints you provided. I’ve talked about the pros and cons of excessive use of coverage driven methods here and here. Anyway, sometimes you just want to take an existing test and quickly create a number of variants off of it to make a small regression suite (that you might even throw away later on). For example – you could have a basic test that does some CPU writes and then drives random frames. During configuration you write to a register that sets the FIFO level and you want to have 10 different tests, each writes a different value to this register.

Attachments:
FileDescriptionFile size
Download this file (autodup.txt)AutoDupCreate test variants automatically3 Kb
 
Plug, Play and Reuse! PDF Print E-mail
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Thursday, 04 March 2010 17:19

Time to talk about module-to-system reuse, a very important topic. If you plan your verification environment properly (using one of the common methodologies in the market today or your own) you’ll be able to easily build a system level verification environment that reuses most of your module level environments (i.e. sub-environments). However, even if all your sub-environments are well suited for plug and play reuse at the top level, there are still considerations to be made regarding the overall topology. In other words, how do you go about connecting the sub-environments to each other to make an effective top level environment? Here are 3 methods that you can use.

 
Prepare For Your Next Job Interview PDF Print E-mail
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Wednesday, 06 January 2010 16:10

Succeeding at job interviews requires practice. If you're applying for a verification job you'd better get yourself well prepared both mentally and technically. Nevertheless, a great deal of tension could be avoided if you knew in advance what sort of technical questions you might be facing. Different managers will ask different questions, usually from their own area of expertise, and not necessarily yours. So, we've collected for you some of the best websites that offer job interview questions that should help you in your next verification job interview. Wouldn't hurt to review them and plan your answers in advance.

 
How To Choose Your Verification Service Provider PDF Print E-mail
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Thursday, 24 December 2009 16:12

If you’re looking for an outsourcing solution for your verification problem then a quick look around will tell you that there are many alternatives out there. The number of verification contractors has grown rapidly over the recent years and today you can find anything from freelance contractors through big consulting companies with tens or sometimes hundreds of engineers offering various service models and packages, off-site and on-site, hourly-based , fixed price, turnkey, and so on. How do you know what’s good for you? Here are a few quick tips:

 
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