Home

Search

Prepare For Your Next Job Interview PDF Print E-mail
User Rating: / 25
PoorBest 
Wednesday, 06 January 2010 16:10

Succeeding at job interviews requires practice. If you're applying for a verification job you'd better get yourself well prepared both mentally and technically. Nevertheless, a great deal of tension could be avoided if you knew in advance what sort of technical questions you might be facing. Different managers will ask different questions, usually from their own area of expertise, and not necessarily yours. So, we've collected for you some of the best websites that offer job interview questions that should help you in your next verification job interview. Wouldn't hurt to review them and plan your answers in advance.

 

A great source for questions (not many answers though) about SystemVerilog, Verilog, and Specman - http://www.testbench.in/IQ_00_INDEX.html

 

Applying for a Specman job? Make sure to check this out - http://www.specman-verification.com/index.php?entry=entry061218-182034

 

Not really verification, but if you're applying for a SystemVerilog job, it's good to know this as well - http://www.rficdesign.com/verilog-interview-question

 

Practice Perl questions here - http://www.techinterviews.com/perl-interview-questions-and-answers

 

Tricky riddles, some interviewers like to challenge their candidates... http://www.vlsichipdesign.com/index.php/Chip-Design-Articles/interview-puzzles.html

 

 

More tips from us:

  • Try to find out what HVL (SystemVerilog, e, SystemC, etc.) you'll be programming in. Practice your programming skills in that language before the interview.
  • Practice on presenting your last verification project. You should be able to draw a block diagram and tell what parts were under your responsibility. Know all the details!
  • Think of at least 3 big achievements that you were resonsible for in your last project. If your recommenders can reconfirm that later - it's even better.
  • Don't be afraid to tell that you LIKE verification and wish to become a professional in that area. Managers don't always realize that.

 

If you find additional sources please share! 

 
More articles :

» We Hear Ya!

 During the last months we conducted a poll about what you guys would you like to read more about on ThinkVerification and here are the results: Verification Methodology - 41%SystemVerilog Tutorials - 31%e Tutorials - 13%Interviews - 12%...

» What Makes A Great Verification Team GREAT?

Your tool provider won’t tell you that, nor will those fancy methodology books, but verification is not all about mastering technical skills. True, those will help you very much in your daily work but verification is first and foremost TEAM WORK....

» Debug Like The Pro's

You’ve developed a verification environment, hooked up the DUT, written a bunch of tests and alas! Simulations start to fail So just before you dive in, Think Verification’s tips department recommends the following:

» Who Wants To Be A Verifier?

Are you looking for a job in verification? Are you pursuing a career in verification? Congratulations! There a few things you might want to consider about your prospective employer before you sign the contract. In today's important article we'll try...

» Progressive Coverage

Progressive Coverage is a method of coverage collection that’s highly applicable in communication devices, but may as well be applied elsewhere. Now before I start to babble about my philosophy on coverage collection why don't I just give you an...

Comments  

 
0 #1 2010-05-17 11:39
Checkout these very unique collection of interview questions that covers various aspects of chip design! http://digitalelectronics.blogspot.com/search/label/Interview%20Questions
Quote
 
 
0 #2 2010-05-17 11:40
http://digitalelectronics.blogspot.com/search/label/Interview%20Questions
Quote
 

Add comment


Security code
Refresh

Copyright © 2019 Think Verification - Tips & Insights on ASIC Verification. All Rights Reserved.
Joomla! is Free Software released under the GNU/GPL License.